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Verilog coding for logic synthesis : Weng Fook Lee.
Verilog coding for logic synthesis : Weng Fook Lee.
Lee, Weng Fook. | John Wiley & Sons | 2003 대출가능
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2
High-Speed VLSI Interconnections : modeling, analysis and simulation
High-Speed VLSI Interconnections : modeling, analysis and simulation
Goel, Ashok K | John Wiley & Sons | 1994 대출가능
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3
Computer Aided Logical Design : with emphasis on VLSI
Computer Aided Logical Design : with emphasis on VLSI
Hill, Fredrick. J. | John Wiley & Sons | 1993 대출가능
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